BibTeX
@inproceedings{DBLP:conf/sips/LiuRS06,
author = {Wei Liu and
Junrye Rho and
Wonyong Sung},
title = {Low-Power High-Throughput BCH Error Correction VLSI Design
for Multi-Level Cell NAND Flash Memories},
booktitle = {SiPS},
year = {2006},
pages = {303-308},
ee = {http://dx.doi.org/10.1109/SIPS.2006.352599},
crossref = {DBLP:conf/sips/2006},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/sips/2006,
title = {Proceedings of the IEEE Workshop on Signal Processing Systems,
SiPS 2006, Proceedings, October 2-4, 2006, Banff, Alberta,
Canada},
booktitle = {SiPS},
publisher = {IEEE},
year = {2006},
isbn = {1-4244-0382-0},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2009-09-11 by Michael Ley (ley@uni-trier.de)