Energy aware multiple clock domain scheduling for a bit-serial, self-timed architecture.

Heiner Giefers Achim Rettberg Energy aware multiple clock domain scheduling for a bit-serial, self-timed architecture. 113-118 2006 conf/sbcci/2006 SBCCI http://doi.acm.org/10.1145/1150343.1150377 db/conf/sbcci/sbcci2006.html#GiefersR06