BibTeX record conf/sbcci/BortolonFGBCHM16

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@inproceedings{DBLP:conf/sbcci/BortolonFGBCHM16,
  author       = {Felipe Todeschini Bortolon and
                  Sergio Johann Filho and
                  Matheus Gibiluka and
                  Sergio Bampi and
                  Ney Laert Vilar Calazans and
                  Fabiano Passuelo Hessel and
                  Matheus Trevisan Moreira},
  title        = {Design and analysis of the {HF-RISC} processor targeting voltage scaling
                  applications},
  booktitle    = {29th Symposium on Integrated Circuits and Systems Design, {SBCCI}
                  2016, Belo Horizonte, Brazil, August 29 - September 3, 2016},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/SBCCI.2016.7724047},
  doi          = {10.1109/SBCCI.2016.7724047},
  timestamp    = {Sun, 02 Oct 2022 16:14:35 +0200},
  biburl       = {https://dblp.org/rec/conf/sbcci/BortolonFGBCHM16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}