Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP).

Seung Eun Lee Jun Ho Bahn Nader Bagherzadeh Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP). 211-218 2007 SBAC-PAD http://doi.ieeecomputersociety.org/10.1109/SBAC-PAD.2007.18 conf/sbac-pad/2007 db/conf/sbac-pad/sbac-pad2007.html#LeeBB07