BibTeX
@inproceedings{DBLP:conf/rtas/YanZ08,
author = {Jun Yan and
Wei Zhang},
title = {WCET Analysis for Multi-Core Processors with Shared L2 Instruction
Caches},
booktitle = {IEEE Real-Time and Embedded Technology and Applications
Symposium},
year = {2008},
pages = {80-89},
ee = {http://doi.ieeecomputersociety.org/10.1109/RTAS.2008.6},
crossref = {DBLP:conf/rtas/2008},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/rtas/2008,
title = {Proceedings of the 14th IEEE Real-Time and Embedded Technology
and Applications Symposium, RTAS 2008, April 22-24, 2008,
St. Louis, Missouri, USA},
booktitle = {IEEE Real-Time and Embedded Technology and Applications
Symposium},
publisher = {IEEE Computer Society},
year = {2008},
isbn = {978-0-7695-3146-5},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2008-08-20 by Michael Ley (ley@uni-trier.de)