BibTeX record conf/rtas/KaushikP21

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@inproceedings{DBLP:conf/rtas/KaushikP21,
  author       = {Anirudh Mohan Kaushik and
                  Hiren D. Patel},
  title        = {A Systematic Approach to Achieving Tight Worst-Case Latency and High-Performance
                  Under Predictable Cache Coherence},
  booktitle    = {27th {IEEE} Real-Time and Embedded Technology and Applications Symposium,
                  {RTAS} 2021, Nashville, TN, USA, May 18-21, 2021},
  pages        = {105--117},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/RTAS52030.2021.00017},
  doi          = {10.1109/RTAS52030.2021.00017},
  timestamp    = {Fri, 09 Jul 2021 14:45:15 +0200},
  biburl       = {https://dblp.org/rec/conf/rtas/KaushikP21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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