<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/rsp/ChattopadhyaySZLAM06" mdate="2006-09-06">
<author>Anupam Chattopadhyay</author>
<author>Arnab Sinha</author>
<author>Diandian Zhang</author>
<author>Rainer Leupers</author>
<author>Gerd Ascheid</author>
<author>Heinrich Meyr</author>
<title>Integrated Verification Approach during ADL-Driven Processor Design.</title>
<pages>110-118</pages>
<year>2006</year>
<crossref>conf/rsp/2006</crossref>
<booktitle>IEEE International Workshop on Rapid System Prototyping</booktitle>
<ee>http://doi.ieeecomputersociety.org/10.1109/RSP.2006.21</ee>
<url>db/conf/rsp/rsp2006.html#ChattopadhyaySZLAM06</url>
</inproceedings>
</dblp>
