Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee verilog synthesizability.

Jennifer Gillenwater Gregory Malecha Cherif Salama Angela Yun Zhu Walid Taha Jim Grundy John O'Leary Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee verilog synthesizability. 41-50 2008 PEPM http://doi.acm.org/10.1145/1328408.1328416 conf/pepm/2008 db/conf/pepm/pepm2008.html#GillenwaterMSZTGO08