<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/pdpta/TateOSSUAWNN06" mdate="2006-11-28">
<author>Ippei Tate</author>
<author>Yoshiyasu Ogasawara</author>
<author>Mikiko Sato</author>
<author>Koichi Sasada</author>
<author>Kaname Uchikura</author>
<author>Kazunari Asano</author>
<author>Satoshi Watanabe</author>
<author>Mitaro Namiki</author>
<author>Hironori Nakajo</author>
<title>A Model of Implementable SMT Processor on FPGA.</title>
<pages>909-915</pages>
<year>2006</year>
<crossref>conf/pdpta/2006-2</crossref>
<booktitle>PDPTA</booktitle>
<url>db/conf/pdpta/pdpta2006-2.html#TateOSSUAWNN06</url>
</inproceedings>
</dblp>
