BibTeX
@inproceedings{DBLP:conf/pdpta/OgasawaraKYSSUNN05,
author = {Yoshiyasu Ogasawara and
Norito Kato and
Masanori Yamato and
Mikiko Sato and
Koichi Sasada and
Kaname Uchikura and
Mitaro Namiki and
Hironori Nakajo},
title = {A New Model of Reconfigurable Cache for an SMT Processor
and its FPGA Implementation},
booktitle = {PDPTA},
year = {2005},
pages = {447-453},
crossref = {DBLP:conf/pdpta/2005-2},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/pdpta/2005-2,
editor = {Hamid R. Arabnia},
title = {Proceedings of the International Conference on Parallel
and Distributed Processing Techniques and Applications,
PDPTA 2005, Las Vegas, Nevada, USA, June 27-30, 2005, Volume
2},
booktitle = {PDPTA},
publisher = {CSREA Press},
year = {2005},
isbn = {1-932415-59-9},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2006-01-25 by Michael Ley (ley@uni-trier.de)