<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/pdpta/KatoYTSSUNN04" mdate="2004-11-19">
<author>Norito Kato</author>
<author>Masanori Yamato</author>
<author>Osamu Tujimoto</author>
<author>Mikiko Sato</author>
<author>Koichi Sasada</author>
<author>Kaname Uchikura</author>
<author>Mitaro Namiki</author>
<author>Hironori Nakajo</author>
<title>Dynamic Allocation of Physical Register Banks for an SMT Processor.</title>
<pages>317-323</pages>
<year>2004</year>
<crossref>conf/pdpta/2004-1</crossref>
<booktitle>PDPTA</booktitle>
<url>db/conf/pdpta/pdpta2004-1.html#KatoYTSSUNN04</url>
</inproceedings>
</dblp>
