BibTeX record conf/patmos/VratonjicZGZMCVO09

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@inproceedings{DBLP:conf/patmos/VratonjicZGZMCVO09,
  author       = {Milena Vratonjic and
                  Matthew M. Ziegler and
                  George Gristede and
                  Victor V. Zyuban and
                  Thomas Mitchell and
                  Ee Cho and
                  Chandu Visweswariah and
                  Vojin G. Oklobdzija},
  editor       = {Jos{\'{e}} Monteiro and
                  Rene van Leuken},
  title        = {A New Methodology for Power-Aware Transistor Sizing: Free Power Recovery
                  {(FPR)}},
  booktitle    = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
                  and Simulation, 19th International Workshop, {PATMOS} 2009, Delft,
                  The Netherlands, September 9-11, 2009, Revised Selected Papers},
  series       = {Lecture Notes in Computer Science},
  volume       = {5953},
  pages        = {307--316},
  publisher    = {Springer},
  year         = {2009},
  url          = {https://doi.org/10.1007/978-3-642-11802-9\_35},
  doi          = {10.1007/978-3-642-11802-9\_35},
  timestamp    = {Tue, 13 Sep 2022 21:45:42 +0200},
  biburl       = {https://dblp.org/rec/conf/patmos/VratonjicZGZMCVO09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}