![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
BibTeX record conf/patmos/SierraCC18
@inproceedings{DBLP:conf/patmos/SierraCC18, author = {Roberto Sierra and Carlos Carreras and Gabriel Caffarena}, title = {Automated Timing Characterization of High-Performance Macroblocks for Latency Insensitive {FPGA} Designs}, booktitle = {28th International Symposium on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2018, Platja d'Aro, Spain, July 2-4, 2018}, pages = {7--12}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/PATMOS.2018.8464170}, doi = {10.1109/PATMOS.2018.8464170}, timestamp = {Mon, 03 Jan 2022 22:28:19 +0100}, biburl = {https://dblp.org/rec/conf/patmos/SierraCC18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.