BibTeX record conf/patmos/Ruiz-de-ClavijoJDCMOV05

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@inproceedings{DBLP:conf/patmos/Ruiz-de-ClavijoJDCMOV05,
  author       = {Paulino Ruiz{-}de{-}Clavijo and
                  Jorge Juan{-}Chico and
                  Manuel Jes{\'{u}}s Bellido D{\'{\i}}az and
                  Alejandro Mill{\'{a}}n Calder{\'{o}}n and
                  David Guerrero Martos and
                  Enrique Ost{\'{u}}a and
                  Julian Viejo},
  editor       = {Vassilis Paliouras and
                  Johan Vounckx and
                  Diederik Verkest},
  title        = {Logic-Level Fast Current Simulation for Digital {CMOS} Circuits},
  booktitle    = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
                  and Simulation, 15th International Workshop, {PATMOS} 2005, Leuven,
                  Belgium, September 21-23, 2005, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {3728},
  pages        = {425--435},
  publisher    = {Springer},
  year         = {2005},
  url          = {https://doi.org/10.1007/11556930\_44},
  doi          = {10.1007/11556930\_44},
  timestamp    = {Tue, 21 Mar 2023 21:02:37 +0100},
  biburl       = {https://dblp.org/rec/conf/patmos/Ruiz-de-ClavijoJDCMOV05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}