![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
BibTeX record conf/patmos/Renaudin10
@inproceedings{DBLP:conf/patmos/Renaudin10, author = {Marc Renaudin}, editor = {Ren{\'{e}} van Leuken and Gilles Sicard}, title = {{ASTEC:} Asynchronous Technology for Low Power and Secured Embedded Systems}, booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - 20th International Workshop, {PATMOS} 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers}, series = {Lecture Notes in Computer Science}, volume = {6448}, pages = {253}, publisher = {Springer}, year = {2010}, url = {https://doi.org/10.1007/978-3-642-17752-1\_28}, doi = {10.1007/978-3-642-17752-1\_28}, timestamp = {Tue, 13 Sep 2022 21:45:42 +0200}, biburl = {https://dblp.org/rec/conf/patmos/Renaudin10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.