BibTeX record conf/patmos/LopezGHLH03

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@inproceedings{DBLP:conf/patmos/LopezGHLH03,
  author       = {Sonia L{\'{o}}pez and
                  Oscar Garnica and
                  Jos{\'{e}} Ignacio Hidalgo and
                  Juan Lanchares and
                  Rom{\'{a}}n Hermida},
  editor       = {Jorge Juan{-}Chico and
                  Enrico Macii},
  title        = {Power-Consumption RRRRreduction in Asynchronous Circuits Using Delay
                  Path Unequalization},
  booktitle    = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
                  and Simulation, 13th International Workshop, {PATMOS} 2003, Torino,
                  Italy, September 10-12, 2003, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {2799},
  pages        = {151--160},
  publisher    = {Springer},
  year         = {2003},
  url          = {https://doi.org/10.1007/978-3-540-39762-5\_17},
  doi          = {10.1007/978-3-540-39762-5\_17},
  timestamp    = {Sat, 09 Apr 2022 12:43:17 +0200},
  biburl       = {https://dblp.org/rec/conf/patmos/LopezGHLH03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}