BibTeX record conf/patmos/FragosoSR03

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@inproceedings{DBLP:conf/patmos/FragosoSR03,
  author       = {Jo{\~{a}}o Leonardo Fragoso and
                  Gilles Sicard and
                  Marc Renaudin},
  editor       = {Jorge Juan{-}Chico and
                  Enrico Macii},
  title        = {Power/Area Tradeoffs in 1-of-M Parallel-Prefix Asynchronous Adders},
  booktitle    = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
                  and Simulation, 13th International Workshop, {PATMOS} 2003, Torino,
                  Italy, September 10-12, 2003, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {2799},
  pages        = {171--180},
  publisher    = {Springer},
  year         = {2003},
  url          = {https://doi.org/10.1007/978-3-540-39762-5\_19},
  doi          = {10.1007/978-3-540-39762-5\_19},
  timestamp    = {Tue, 14 May 2019 10:00:54 +0200},
  biburl       = {https://dblp.org/rec/conf/patmos/FragosoSR03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}