BibTeX record conf/patmos/ChielleKC14

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@inproceedings{DBLP:conf/patmos/ChielleKC14,
  author       = {Eduardo Chielle and
                  Fernanda Lima Kastensmidt and
                  Sergio Cuenca{-}Asensi},
  title        = {Tuning software-based fault-tolerance techniques for power optimization},
  booktitle    = {24th International Workshop on Power and Timing Modeling, Optimization
                  and Simulation, PATMOS), Palma de Mallorca, Spain, September 29 -
                  Oct. 1, 2014},
  pages        = {1--7},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/PATMOS.2014.6951871},
  doi          = {10.1109/PATMOS.2014.6951871},
  timestamp    = {Thu, 23 Jun 2022 19:57:21 +0200},
  biburl       = {https://dblp.org/rec/conf/patmos/ChielleKC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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