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BibTeX record conf/paap/0005SZ19
@inproceedings{DBLP:conf/paap/0005SZ19, author = {Xiaojun Wang and Feng Shi and Hong Zhang}, editor = {Hong Shen and Yingpeng Sang}, title = {A Novel Speedup Evaluation for Multicore Architecture Based Topology of On-Chip Memory}, booktitle = {Parallel Architectures, Algorithms and Programming - 10th International Symposium, {PAAP} 2019, Guangzhou, China, December 12-14, 2019, Revised Selected Papers}, series = {Communications in Computer and Information Science}, volume = {1163}, pages = {35--47}, publisher = {Springer}, year = {2019}, url = {https://doi.org/10.1007/978-981-15-2767-8\_4}, doi = {10.1007/978-981-15-2767-8\_4}, timestamp = {Tue, 20 Oct 2020 14:11:39 +0200}, biburl = {https://dblp.org/rec/conf/paap/0005SZ19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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