Bi-Synchronous FIFO for Synchronous Circuit Communication Well Suited for Network-on-Chip in GALS Architectures.

Ivan Miro Panades Alain Greiner Bi-Synchronous FIFO for Synchronous Circuit Communication Well Suited for Network-on-Chip in GALS Architectures. 83-94 2007 conf/nocs/2007 NOCS http://doi.ieeecomputersociety.org/10.1109/NOCS.2007.14 db/conf/nocs/nocs2007.html#PanadesG07