BibTeX record conf/mwscas/XuYLW14

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@inproceedings{DBLP:conf/mwscas/XuYLW14,
  author       = {Bing Xu and
                  Shouyi Yin and
                  Leibo Liu and
                  Shaojun Wei},
  title        = {Low-power loop pipelining mapping onto {CGRA} utilizing variable dual
                  {VDD}},
  booktitle    = {{IEEE} 57th International Midwest Symposium on Circuits and Systems,
                  {MWSCAS} 2014, College Station, TX, USA, August 3-6, 2014},
  pages        = {242--245},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/MWSCAS.2014.6908397},
  doi          = {10.1109/MWSCAS.2014.6908397},
  timestamp    = {Fri, 24 May 2024 22:53:01 +0200},
  biburl       = {https://dblp.org/rec/conf/mwscas/XuYLW14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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