![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
BibTeX record conf/mtv/Sziray06
@inproceedings{DBLP:conf/mtv/Sziray06, author = {J{\'{o}}zsef Sziray}, editor = {Magdy S. Abadir and Li{-}C. Wang and Jayanta Bhadra}, title = {Test Calculation for Logic and Delay Faults in Digital Circuits}, booktitle = {Seventh International Workshop on Microprocessor Test and Verification {(MTV} 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, {USA}}, pages = {20--32}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/MTV.2006.21}, doi = {10.1109/MTV.2006.21}, timestamp = {Fri, 24 Mar 2023 00:05:09 +0100}, biburl = {https://dblp.org/rec/conf/mtv/Sziray06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.