VollrathSGSJ06'

BibTeX

@inproceedings{DBLP:conf/mtdt/VollrathSGSJ06,
  author    = {J{\"o}rg E. Vollrath and
               J{\"u}rg Schwizer and
               Marcin Gnat and
               Ralf Schneider and
               Bret Johnson},
  title     = {DDR2 DRAM Output Timing Optimization},
  booktitle = {MTDT},
  year      = {2006},
  pages     = {49-54},
  ee        = {http://doi.ieeecomputersociety.org/10.1109/MTDT.2006.9},
  crossref  = {DBLP:conf/mtdt/2006},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

@proceedings{DBLP:conf/mtdt/2006,
  title     = {14th IEEE International Workshop on Memory Technology, Design,
               and Testing (MTDT 2006), 2-4 August 2006, Taipei, Taiwan},
  booktitle = {MTDT},
  publisher = {IEEE Computer Society},
  year      = {2006},
  isbn      = {0-7695-2572-5},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}