BibTeX record conf/mtdt/Hashimoto02

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@inproceedings{DBLP:conf/mtdt/Hashimoto02,
  author       = {Masashi Hashimoto},
  title        = {Adder Merged {DRAM} Architecture},
  booktitle    = {10th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2002), 10-12 July 2002, Isle of Bendor, France},
  pages        = {88--94},
  publisher    = {{IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/MTDT.2002.1029768},
  doi          = {10.1109/MTDT.2002.1029768},
  timestamp    = {Fri, 24 Mar 2023 00:03:36 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Hashimoto02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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