BibTeX record conf/micro/JingWFYJLL16

• > Home > conf/micro/JingWFYJLL16

@inproceedings{DBLP:conf/micro/JingWFYJLL16,
  author       = {Naifeng Jing and
                  Jianfei Wang and
                  Fengfeng Fan and
                  Wenkang Yu and
                  Li Jiang and
                  Chao Li and
                  Xiaoyao Liang},
  title        = {Cache-emulated register file: An integrated on-chip memory architecture
                  for high performance GPGPUs},
  booktitle    = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
                  {MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
  pages        = {14:1--14:12},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MICRO.2016.7783717},
  doi          = {10.1109/MICRO.2016.7783717},
  timestamp    = {Tue, 31 May 2022 14:39:58 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/JingWFYJLL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}