Formal Verification of an Intel XScale Processor Model with Scoreboarding, Specialized Execution Pipelines, and Impress Data-Memory Exceptions.

Sudarshan K. Srinivasan Miroslav N. Velev Formal Verification of an Intel XScale Processor Model with Scoreboarding, Specialized Execution Pipelines, and Impress Data-Memory Exceptions. 65-74 2003 conf/memocode/2003 MEMOCODE http://csdl.computer.org/comp/proceedings/memocode/2003/1923/00/19230065abs.htm db/conf/memocode/memocode2003.html#SrinivasanV03