BibTeX record conf/latw/BenitesK18

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@inproceedings{DBLP:conf/latw/BenitesK18,
  author       = {Luis Alberto Contreras Benites and
                  Fernanda Lima Kastensmidt},
  title        = {Automated design flow for applying Triple Modular Redundancy {(TMR)}
                  in complex digital circuits},
  booktitle    = {19th {IEEE} Latin-American Test Symposium, {LATS} 2018, Sao Paulo,
                  Brazil, March 12-14, 2018},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/LATW.2018.8349668},
  doi          = {10.1109/LATW.2018.8349668},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/latw/BenitesK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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