Beyond P-Cell and Gate-Level: Accuracy Requirements for Simulation of Nanometer SoC Designs.

Brian Marshall Beyond P-Cell and Gate-Level: Accuracy Requirements for Simulation of Nanometer SoC Designs. 23-26 2004 conf/iwsoc/2004 IWSOC http://dx.doi.org/10.1109/IWSOC.2004.1319843 db/conf/iwsoc/iwsoc2004.html#Marshall04