BibTeX record conf/iwls/ThepayasuwanD02

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@inproceedings{DBLP:conf/iwls/ThepayasuwanD02,
  author       = {Nattawut Thepayasuwan and
                  Alex Doboli},
  title        = {A Methodology for Core Placement and Bus Synthesis under Time, Area
                  and Energy Consumption Constraints},
  booktitle    = {11th {IEEE/ACM} International Workshop on Logic {\&} Synthesis,
                  {IWLS} 2002, June 4-7, 2002, New Orleans, Louisiana, {USA}},
  pages        = {57--60},
  year         = {2002},
  timestamp    = {Sun, 04 Aug 2019 18:01:44 +0200},
  biburl       = {https://dblp.org/rec/conf/iwls/ThepayasuwanD02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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