A Hierarchical DFT Architecture for Chip, Board and System Test/Debug.

Charles Njinda A Hierarchical DFT Architecture for Chip, Board and System Test/Debug. 1061-1071 2004 conf/itc/2004 ITC http://doi.ieeecomputersociety.org/10.1109/ITC.2004.12 db/conf/itc/itc2004.html#Njinda04