<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/itc/BarzilaiCINRRS86" mdate="2006-07-11">
<author>Zeev Barzilai</author>
<author>J. Lawrence Carter</author>
<author>Vijay S. Iyengar</author>
<author>Indira Nair</author>
<author>Barry K. Rosen</author>
<author>Joe D. Rutledge</author>
<author>Gabriel M. Silberman</author>
<title>Efficient Fault Simulation of CMOS Circuits with Accurate Models.</title>
<pages>520-529</pages>
<year>1986</year>
<crossref>conf/itc/1986</crossref>
<booktitle>ITC</booktitle>
<url>db/conf/itc/itc1986.html#BarzilaiCINRRS86</url>
</inproceedings>
</dblp>
