BibTeX record conf/itc/BaileyMSTWFAWR02

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@inproceedings{DBLP:conf/itc/BaileyMSTWFAWR02,
  author       = {Robert Bailey and
                  A. Metayer and
                  B. Svrcek and
                  Nandu Tendolkar and
                  E. Wolf and
                  Eric Fiene and
                  Mike Alexander and
                  Rick Woltenberg and
                  Rajesh Raina},
  title        = {Test Methodology for Motorola's High Performance e500 Core Based on
                  PowerPC Instruction Set Architecture},
  booktitle    = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
                  MD, USA, October 7-10, 2002},
  pages        = {574--583},
  publisher    = {{IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/TEST.2002.1041808},
  doi          = {10.1109/TEST.2002.1041808},
  timestamp    = {Thu, 23 Mar 2023 23:58:38 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/BaileyMSTWFAWR02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}