Pawel Chodowiec Kris Gaj Peter Bellows Brian Schott Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple DES Using SLAAC-1V FPGA Accelerator Board. 220-234 2001 conf/isw/2001 ISC http://link.springer.de/link/service/series/0558/bibs/2200/22000220.htm db/conf/isw/isc2001.html#ChodowiecGBS01