BibTeX record conf/isvlsi/VigTJL17

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@inproceedings{DBLP:conf/isvlsi/VigTJL17,
  author       = {Saru Vig and
                  Tan Yng Tzer and
                  Guiyuan Jiang and
                  Siew{-}Kei Lam},
  title        = {Customizing Skewed Trees for Fast Memory Integrity Verification in
                  Embedded Systems},
  booktitle    = {2017 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2017,
                  Bochum, Germany, July 3-5, 2017},
  pages        = {213--218},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISVLSI.2017.45},
  doi          = {10.1109/ISVLSI.2017.45},
  timestamp    = {Fri, 24 Mar 2023 00:02:42 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/VigTJL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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