BibTeX record conf/isvlsi/TanWXL20

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@inproceedings{DBLP:conf/isvlsi/TanWXL20,
  author       = {Weihang Tan and
                  Antian Wang and
                  Yunhao Xu and
                  Yingjie Lao},
  title        = {Area-Efficient Pipelined {VLSI} Architecture for Polar Decoder},
  booktitle    = {2020 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2020,
                  Limassol, Cyprus, July 6-8, 2020},
  pages        = {352--357},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISVLSI49217.2020.00071},
  doi          = {10.1109/ISVLSI49217.2020.00071},
  timestamp    = {Wed, 12 Aug 2020 14:55:40 +0200},
  biburl       = {https://dblp.org/rec/conf/isvlsi/TanWXL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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