409ps 4.7 FO4 64b Adder Based on Output Prediction Logic in 0.18um CMOS.

Sheng Sun Yi Han Xinyu Guo Kian Haur Chong Larry McMurchie Carl Sechen 409ps 4.7 FO4 64b Adder Based on Output Prediction Logic in 0.18um CMOS. 52-58 2005 conf/isvlsi/2005 ISVLSI http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2005.2 db/conf/isvlsi/isvlsi2005.html#SunHGCMS05