BibTeX record conf/isvlsi/RanganathanNH06

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@inproceedings{DBLP:conf/isvlsi/RanganathanNH06,
  author       = {Nagarajan Ranganathan and
                  Ravi Namballa and
                  Narender Hanchate},
  title        = {{CHESS:} {A} Comprehensive Tool for {CDFG} Extraction and Synthesis
                  of Low Power Designs from {VHDL}},
  booktitle    = {2006 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
                  2006), 2-3 March 2006, Karlsruhe, Germany},
  pages        = {329--334},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISVLSI.2006.27},
  doi          = {10.1109/ISVLSI.2006.27},
  timestamp    = {Fri, 24 Mar 2023 00:02:42 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/RanganathanNH06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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