BibTeX record conf/isvlsi/JuangL16

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@inproceedings{DBLP:conf/isvlsi/JuangL16,
  author       = {Tso{-}Bing Juang and
                  Ying{-}Ren Lee},
  title        = {Seamlessly Pipelined Shift-and-Add Circuits Based on Precise Delay
                  Analysis and Its Applications},
  booktitle    = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2016, Pittsburgh,
                  PA, USA, July 11-13, 2016},
  pages        = {625--630},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/ISVLSI.2016.49},
  doi          = {10.1109/ISVLSI.2016.49},
  timestamp    = {Fri, 24 Mar 2023 00:02:41 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/JuangL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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