BibTeX
@inproceedings{DBLP:conf/isss/FornaciariTBSSB02,
author = {William Fornaciari and
Vito Trianni and
Carlo Brandolese and
Donatella Sciuto and
Fabio Salice and
Giovanni Beltrame},
title = {Modeling Assembly Instruction Timing in Superscalar Architectures},
booktitle = {ISSS},
year = {2002},
pages = {132-137},
ee = {http://csdl.computer.org/comp/proceedings/isss/2002/2246/00/22460132abs.htm},
crossref = {DBLP:conf/isss/2002},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/isss/2002,
title = {Proceedings of the 15th International Symposium on System
Synthesis (ISSS 2002), October 2-4, 2002, Kyoto, Japan},
booktitle = {ISSS},
publisher = {IEEE Computer Society},
year = {2002},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2004-10-28 by Michael Ley (ley@uni-trier.de)