BibTeX record conf/isscc/YaoLNHLGZKKHJLH17

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@inproceedings{DBLP:conf/isscc/YaoLNHLGZKKHJLH17,
  author       = {Chih{-}Wei Yao and
                  Wing Fai Loke and
                  Ronghua Ni and
                  Yongping Han and
                  Haoyang Li and
                  Kunal Godbole and
                  Yongrong Zuo and
                  Sangsoo Ko and
                  Nam{-}Seog Kim and
                  Sangwook Han and
                  Ikkyun Jo and
                  Joonhee Lee and
                  Juyoung Han and
                  Daehyeon Kwon and
                  Chulho Kim and
                  Shinwoong Kim and
                  Sang Won Son and
                  Thomas Byunghak Cho},
  title        = {24.8 {A} 14nm fractional-N digital {PLL} with 0.14psrms jitter and
                  -78dBc fractional spur for cellular RFICs},
  booktitle    = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2017, San Francisco, CA, USA, February 5-9, 2017},
  pages        = {422--423},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISSCC.2017.7870441},
  doi          = {10.1109/ISSCC.2017.7870441},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/YaoLNHLGZKKHJLH17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}