BibTeX record conf/isscc/XuKLCCMZLLJPSTM21

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@inproceedings{DBLP:conf/isscc/XuKLCCMZLLJPSTM21,
  author       = {Danfeng Xu and
                  Yu Kou and
                  Paul Lai and
                  Zichuan Cheng and
                  Tze Yin Cheung and
                  Larry Moser and
                  Yang Zhang and
                  Xiaolong Liu and
                  Man Pio Lam and
                  Haikun Jia and
                  Quan Pan and
                  Wing Hong Szeto and
                  Chi Fai Tang and
                  Ka Fai Mak and
                  Khawar Sarfraz and
                  Tairan Zhu and
                  Ming Kwan and
                  Emily Yim Lee Au and
                  Cormac Conroy and
                  Kai{-}Keung Chan},
  title        = {8.5 {A} Scalable Adaptive ADC/DSP-Based 1.25-to-56Gbps/112Gbps High-Speed
                  Transceiver Architecture Using Decision-Directed {MMSE} {CDR} in 16nm
                  and 7nm},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
                  San Francisco, CA, USA, February 13-22, 2021},
  pages        = {134--136},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISSCC42613.2021.9366063},
  doi          = {10.1109/ISSCC42613.2021.9366063},
  timestamp    = {Thu, 03 Aug 2023 08:59:39 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/XuKLCCMZLLJPSTM21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}