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BibTeX record conf/isscc/Weltin-WuTBS08
@inproceedings{DBLP:conf/isscc/Weltin-WuTBS08, author = {Colin Weltin{-}Wu and Enrico Temporiti and Daniele Baldi and Francesco Svelto}, title = {A 3GHz Fractional-N All-Digital {PLL} with Precise Time-to-Digital Converter Calibration and Mismatch Correction}, booktitle = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008}, pages = {344--345}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/ISSCC.2008.4523198}, doi = {10.1109/ISSCC.2008.4523198}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isscc/Weltin-WuTBS08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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