BibTeX record conf/isscc/WangC23

download as .bib file

@inproceedings{DBLP:conf/isscc/WangC23,
  author       = {Yi{-}Hu Wang and
                  Soon{-}Jyh Chang},
  title        = {A 7b 4.5GS/s 4{\texttimes} Interleaved {SAR} {ADC} with Fully On-Chip
                  Background Timing Skew Calibration},
  booktitle    = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2023,
                  San Francisco, CA, USA, February 19-23, 2023},
  pages        = {274--275},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ISSCC42615.2023.10067573},
  doi          = {10.1109/ISSCC42615.2023.10067573},
  timestamp    = {Wed, 29 Mar 2023 15:53:39 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/WangC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.