BibTeX record conf/isscc/VarmaGCCGMYYCYHRHHHHLTWH24

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@inproceedings{DBLP:conf/isscc/VarmaGCCGMYYCYHRHHHHLTWH24,
  author       = {Anshul Varma and
                  Sumanth Gururajarao and
                  HsinChen Chen and
                  Tao Chen and
                  Gordon Gammie and
                  Hugh Mair and
                  Jen{-}Hang Yang and
                  Hao{-}Hsiang Yu and
                  Shun{-}Chieh Chang and
                  Cheng{-}Hao Yang and
                  Li{-}An Huang and
                  Kumar Ramanathan and
                  Ramesh Halli and
                  Efron Ho and
                  Ta{-}Wen Hung and
                  Sung S.{-}Y. Hsueh and
                  LiangChe Li and
                  Achuta Thippana and
                  Ericbill Wang and
                  Sa Hwang},
  title        = {2.1 {A} 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 {CPU} Subsystem-Based
                  5G Mobile SoC},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024,
                  San Francisco, CA, USA, February 18-22, 2024},
  pages        = {36--38},
  publisher    = {{IEEE}},
  year         = {2024},
  url          = {https://doi.org/10.1109/ISSCC49657.2024.10454494},
  doi          = {10.1109/ISSCC49657.2024.10454494},
  timestamp    = {Tue, 19 Mar 2024 09:04:31 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/VarmaGCCGMYYCYHRHHHHLTWH24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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