BibTeX record conf/isscc/UpadhyayaPLCRZN18

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@inproceedings{DBLP:conf/isscc/UpadhyayaPLCRZN18,
  author       = {Parag Upadhyaya and
                  Chi Fung Poon and
                  Siok{-}Wei Lim and
                  Junho Cho and
                  Arianne Roldan and
                  Wenfeng Zhang and
                  Jin Namkoong and
                  Toan Pham and
                  Bruce Xu and
                  Winson Lin and
                  Hongtao Zhang and
                  Nakul Narang and
                  Kee Hian Tan and
                  Geoff Zhang and
                  Yohan Frans and
                  Ken Chang},
  title        = {A fully adaptive 19-to-56Gb/s {PAM-4} wireline transceiver with a
                  configurable {ADC} in 16nm FinFET},
  booktitle    = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2018, San Francisco, CA, USA, February 11-15, 2018},
  pages        = {108--110},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISSCC.2018.8310207},
  doi          = {10.1109/ISSCC.2018.8310207},
  timestamp    = {Thu, 30 Sep 2021 15:01:34 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/UpadhyayaPLCRZN18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}