BibTeX record conf/isscc/TsengKCHLHMIMNC06

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@inproceedings{DBLP:conf/isscc/TsengKCHLHMIMNC06,
  author       = {Chih Tseng and
                  Jae{-}Hyeong Kim and
                  Suzanne Chen and
                  Mu{-}Hsiang Huang and
                  Chungji Lu and
                  Ikio Hashiguchi and
                  Yoshifumi Miyazima and
                  Masahiro Ichihashi and
                  Kentaro Maki and
                  Katsuya Nakashima and
                  Patrick Chuang},
  title        = {A 72Mb Separate-I/O Synchronous {SRAM} Chip with 504Gb/s Data Bandwidth},
  booktitle    = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
                  2006, Digest of Technical Papers, an Francisco, CA, USA, February
                  6-9, 2006},
  pages        = {2582--2591},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISSCC.2006.1696324},
  doi          = {10.1109/ISSCC.2006.1696324},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/TsengKCHLHMIMNC06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}