BibTeX record conf/isscc/SuCLLLWCHRPLCSL21

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@inproceedings{DBLP:conf/isscc/SuCLLLWCHRPLCSL21,
  author       = {Jian{-}Wei Su and
                  Yen{-}Chi Chou and
                  Ruhui Liu and
                  Ta{-}Wei Liu and
                  Pei{-}Jung Lu and
                  Ping{-}Chun Wu and
                  Yen{-}Lin Chung and
                  Li{-}Yang Hung and
                  Jin{-}Sheng Ren and
                  Tianlong Pan and
                  Sih{-}Han Li and
                  Shih{-}Chieh Chang and
                  Shyh{-}Shyuan Sheu and
                  Wei{-}Chung Lo and
                  Chih{-}I Wu and
                  Xin Si and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {16.3 {A} 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision
                  for {AI} Edge Chips},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
                  San Francisco, CA, USA, February 13-22, 2021},
  pages        = {250--252},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISSCC42613.2021.9365984},
  doi          = {10.1109/ISSCC42613.2021.9365984},
  timestamp    = {Tue, 07 May 2024 20:09:09 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SuCLLLWCHRPLCSL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}