BibTeX record conf/isscc/SiCTHWCWWSLYLHT19

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@inproceedings{DBLP:conf/isscc/SiCTHWCWWSLYLHT19,
  author       = {Xin Si and
                  Jia{-}Jing Chen and
                  Yung{-}Ning Tu and
                  Wei{-}Hsing Huang and
                  Jing{-}Hong Wang and
                  Yen{-}Cheng Chiu and
                  Wei{-}Chen Wei and
                  Ssu{-}Yen Wu and
                  Xiaoyu Sun and
                  Rui Liu and
                  Shimeng Yu and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Qiang Li and
                  Meng{-}Fan Chang},
  title        = {A Twin-8T {SRAM} Computation-In-Memory Macro for Multiple-Bit CNN-Based
                  Machine Learning},
  booktitle    = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2019,
                  San Francisco, CA, USA, February 17-21, 2019},
  pages        = {396--398},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISSCC.2019.8662392},
  doi          = {10.1109/ISSCC.2019.8662392},
  timestamp    = {Wed, 26 Jul 2023 07:50:19 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SiCTHWCWWSLYLHT19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}