@inproceedings{DBLP:conf/isscc/PiloABBGHLPSCKR11,
author = {Harold Pilo and
Igor Arsovski and
Kevin Batson and
Geordie Braceras and
John Gabric and
Robert M. Houle and
Steve Lamphier and
Frank Pavlik and
Adnan Seferagic and
Liang-Yu Chen and
Shang-Bin Ko and
Carl Radens},
title = {A 64Mb SRAM in 32nm High-k metal-gate SOI technology with
0.7V operation enabled by stability, write-ability and read-ability
enhancements},
booktitle = {ISSCC},
year = {2011},
pages = {254-256},
ee = {http://dx.doi.org/10.1109/ISSCC.2011.5746307},
crossref = {DBLP:conf/isscc/2011},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/isscc/2011,
title = {IEEE International Solid-State Circuits Conference, ISSCC
2011, Digest of Technical Papers, San Francisco, CA, USA,
20-24 February, 2011},
booktitle = {ISSCC},
publisher = {IEEE},
year = {2011},
isbn = {978-1-61284-303-2},
ee = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5740653},
bibsource = {DBLP, http://dblp.uni-trier.de}
}