PilleWWSPFBTEPHRC10'

@inproceedings{DBLP:conf/isscc/PilleWWSPFBTEPHRC10,
  author    = {J{\"u}rgen Pille and
               Dieter F. Wendel and
               Otto Wagner and
               Rolf Sautter and
               Wolfgang Penth and
               Thomas Fr{\"o}hnel and
               Stefan B{\"u}ttner and
               Otto A. Torreiter and
               Martin Eckert and
               Jose Paredes and
               David Hrusecky and
               David Ray and
               Miles Canada},
  title     = {A 32kB 2R/1W L1 data cache in 45nm SOI technology for the
               POWER7TM processor},
  booktitle = {ISSCC},
  year      = {2010},
  pages     = {344-345},
  ee        = {http://dx.doi.org/10.1109/ISSCC.2010.5433849},
  crossref  = {DBLP:conf/isscc/2010},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

@proceedings{DBLP:conf/isscc/2010,
  title     = {IEEE International Solid-State Circuits Conference, ISSCC
               2010, Digest of Technical Papers, San Francisco, CA, USA,
               7-11 February, 2010},
  booktitle = {ISSCC},
  publisher = {IEEE},
  year      = {2010},
  isbn      = {978-1-4244-6033-5},
  ee        = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5428240},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}